Research Internship under Prof. Viktor Vafeiadis, MPI-SWS (Jan 2018 - April 2018)

Verifying Concurrent Queue Algorithms under Weak Memory Model.

Research Assistantship at IITH funded by ANURAG, DRDO & BRNS (Jan 2015 - June 2017)

Development of Software Transactional Memory (STM) Library consisting of single version algorithms like (BTO, SGT, MVTO) and multiple version algorithms which enable concurrent threads to execute seamlessly (without using locks). Testing of these libraries on highly concurrent benchmarks like STAMP and Synchrobench. Tools and Languages Used: C++, Pthreads, OpenMP, Intel Parallel Studio XE

External Project under Dr. Tobias Grosser, Dr. Michael Kruse (2016)

Detection of single-entry-single-exit regions used by Polly and the AMD GPU backend in LLVM has quadratic complexity due to dependence on Dominance Frontier. Created a new linear time algorithm which uses already available dominator, post dominator and loop trees to avoid quadratic pre-computation of dominance frontier.

Creating polyhedral statements that contain only a subset of the instructions in a basic block. This allows loop distribution, without introducing excessive scalar dependences. Implementing a heuristic for efficient splitting of basic blocks into polyhedral SCoP statements. Performed experiments on various benchmarks like SPEC CPU 2006, LLVM test-suite to understand the impact of having finer granularity of statements.

Summer Intern at Samsung Research & Development Institute, Delhi (July 2016)

Developed command line programs to reset any USB device in Linux. Understanding of Linux USB stack & Wrote a simple Linux USB Device driver. Deployed a Tizen TV video application for Indian Channel Serial using Youtube API.

Internship under Prof. Uday Khedker, IIT Bombay (June 2013 - June 2014)

Integrated Priority and Temporal view with the existing Logical view in FreeMind, an open source Mind-Mapping tool making it user friendly. Languages Used: Java, HTML, CSS